XE1203FI063TRLF Semtech, XE1203FI063TRLF Datasheet - Page 27

IC TXRX 433/868/915MHZ 48-VQFN

XE1203FI063TRLF

Manufacturer Part Number
XE1203FI063TRLF
Description
IC TXRX 433/868/915MHZ 48-VQFN
Manufacturer
Semtech
Datasheets

Specifications of XE1203FI063TRLF

Frequency
180MHz Center
Data Rate - Maximum
152.3kbps
Modulation Or Protocol
FSK
Applications
AMR, ISM, Home Automation, Process Control
Power - Output
0 ~ 15dBm
Sensitivity
-114dBm
Voltage - Supply
2.4 V ~ 3.6 V
Current - Receiving
14mA
Current - Transmitting
62mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN
Receiving Current
14mA
Transmitting Current
62mA
Data Rate
152.3Kbps
Modulation Type
FSK
No. Of Pins
48
Supply Voltage Range
2.4V To 3.6V
Operating Temperature Range
-40°C To +85°C
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
XE1203FI063TR

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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Quantity:
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5.2.7
This register holds the user supplied reference pattern of 8, 16, 24, or 32 bits (see the ADParam_Psize parameter).
The first byte of this pattern is always stored in the byte at address A[4:0] = 10011. If used, the 2
address A[4:0] = 10100, the 3
The MSB bit of the reference pattern is always bit 7 of address 10011.
Comparing the demodulated data, the first bit received of the last word is compared with bit 7 (the MSB) of byte
address 10011. The last bit received is compared with bit 0 (the LSB) in the Pattern register.
Example of pattern recognition with a 32-bit pattern:
Example of pattern recognition with an 8-bit pattern:
© Semtech 2008
101
101
PATParam_Pattern
Bit 7
Bit 7
previous bits from
ADParam_Sync_loss
ADParam_Fix_bsync
Byte Address
Byte Address
demodulator
Pattern register
10010011
10010011
10010011
10010011
10011
10011
Name
Name
Bit 0
Bit 0
previous
demodulator
Figure 16: Example of pattern recognition with a 32-bit pattern
Figure 17: Example of pattern recognition with an 8-bit pattern
rd
byte at address A[4:0] = 10101, and finally the 4
Bit 7
Bit 7
Bits
7-0
6-0
Bit
last bit received
Byte Address
Byte Address
s
7
10101010
10101010
Xxxxxxxx
10100
10100
Table 16: ADParam Configuration Register
Table 17: PATParam Pattern Registers
Addres
10010
10010
bits
s
Bit 0
Bit 0
Byte Address
from
Description
bit synchronizer configuration:
0-> default configuration
1-> high-interference environment
Number of bits before sync loss detection for Barker decoding
algorithm
10011
10100
10101
10110
27
Bit 7
Bit 7
Byte Address
Byte Address
10010011
10010011
Xxxxxxxx
10101
10101
Description
1
2
3
4
st
nd
rd
th
byte of the reference pattern
byte
byte
byte
Bit 0
Bit 0
th
byte at address A[4:0] = 01011.
Bit 7
Bit 7
Byte Address
Byte Address
last bit received
10101010
10101010
Xxxxxxxx
XE1203F
nd
10110
10110
byte is stored at
www.semtech.com
Bit 0
Bit 0

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