SI1015-A-GM Silicon Laboratories Inc, SI1015-A-GM Datasheet - Page 4

• Manufacturer Part Number: SI1015-A-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1015-A-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 768B RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 768 B
• Supply Current (max): 4 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1868-5

Si1010/1/2/3/4/5
14. Power Management ............................................................................................. 157
15. Cyclic Redundancy Check Unit (CRC0)............................................................. 166
16. On-Chip DC-DC Converter (DC0)........................................................................ 174
17. Voltage Regulator (VREG0)................................................................................. 184
18. Reset Sources ...................................................................................................... 185
4
13.5. Flash Write and Erase Guidelines ................................................................. 151
13.6. Minimizing Flash Read Current ..................................................................... 153
14.1. Normal Mode ................................................................................................. 158
14.2. Idle Mode....................................................................................................... 158
14.3. Stop Mode ..................................................................................................... 159
14.4. Suspend Mode .............................................................................................. 160
14.5. Sleep Mode ................................................................................................... 161
14.6. Configuring Wakeup Sources........................................................................ 162
14.7. Determining the Event that Caused the Last Wakeup................................... 162
14.8. Power Management Specifications ............................................................... 165
15.1. CRC Algorithm............................................................................................... 166
15.2. Preparing for a CRC Calculation ................................................................... 168
15.3. Performing a CRC Calculation ...................................................................... 168
15.4. Accessing the CRC0 Result .......................................................................... 168
15.5. CRC0 Bit Reverse Feature............................................................................ 173
16.1. Startup Behavior............................................................................................ 175
16.2. High Power Applications ............................................................................ 176
16.3. Pulse Skipping Mode..................................................................................... 176
16.4. Enabling the DC-DC Converter ..................................................................... 176
16.5. Minimizing Power Supply Noise .................................................................... 178
16.6. Selecting the Optimum Switch Size............................................................... 178
16.7. DC-DC Converter Clocking Options .............................................................. 178
16.8. DC-DC Converter Behavior in Sleep Mode ................................................... 179
16.9. Bypass Mode................................................................................................. 179
16.10. Low Power Mode......................................................................................... 180
16.11. Passive Diode Mode.................................................................................... 180
16.12. DC-DC Converter Register Descriptions ..................................................... 181
16.13. DC-DC Converter Specifications ................................................................. 183
17.1. Voltage Regulator Electrical Specifications ................................................... 184
18.1. Power-On (VBAT Supply Monitor) Reset ...................................................... 186
18.2. Power-Fail (VDD_MCU/DC+ Supply Monitor) Reset .................................... 188
18.3. External Reset ............................................................................................... 191
18.4. Missing Clock Detector Reset ....................................................................... 191
18.5. Comparator0 Reset ....................................................................................... 191
18.6. PCA Watchdog Timer Reset ......................................................................... 191
18.7. Flash Error Reset .......................................................................................... 191
18.8. SmaRTClock (Real Time Clock) Reset ......................................................... 192
13.5.1. VDD Maintenance and the VDD Monitor .............................................. 151
13.5.2. PSWE Maintenance .............................................................................. 151
13.5.3. System Clock ........................................................................................ 152
Rev. 1.0