FAN3214TMX Fairchild Semiconductor, FAN3214TMX Datasheet - Page 6

• Manufacturer Part Number: FAN3214TMX
• Description: IC GATE DRIVER DUAL 4A 8-SOIC
• Manufacturer: Fairchild Semiconductor
• Type: Dual-4A, High-Speed, Low-Side Gate Driverr

Specifications of FAN3214TMX

• Product: MOSFET Gate Drivers
• Rise Time: 12 ns
• Fall Time: 9 ns
• Propagation Delay Time: 17 ns
• Supply Voltage (max): 20 V
• Supply Voltage (min): - 0.3 V
• Supply Current: 0.7 mA
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Bridge Type: Full Bridge
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 2
• Number Of Outputs: 2
• Output Current: 5 A
• Output Voltage: 20.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2008 Fairchild Semiconductor Corporation
FAN3213 / FAN3214 • Rev. 1.0.2
Supply
Inputs
Output
Electrical Characteristics
Unless otherwise noted, V
out of the device.
Notes:
8.
9.
I
Symbol
PK_SOURCE
I
I
V
t
SOURCE
PK_SINK
D1
V
V
V
V
I
t
t
V
I
HYS_T
I
I
I
SINK
RISE
FALL
RVS
IH_T
IN+
DD
OFF
IL_T
IN-
Not tested in production.
See Timing Diagrams of Figure 6 and Figure 7.
, t
DD
ON
D2
Figure 6. Non-Inverting Timing Diagram
Operating Range
Supply Current, Inputs Not Connected
Turn-On Voltage
Turn-Off Voltage
INx Logic Low Threshold
INx Logic High Threshold
Non-Inverting Input
Inverting Input
TTL Logic Hysteresis Voltage
OUT Current, Mid-Voltage, Sinking
OUT Current, Mid-Voltage, Sourcing
OUT Current, Peak, Sinking
OUT Current, Peak, Sourcing
Output Rise Time
Output Fall Time
Output Propagation Delay, TTL Inputs
Propagation Matching Between Channels
Output Reverse Current Withstand
DD
Parameter
=12V, T
(9)
(9)
J
=-40°C to +125°C. Currents are defined as positive into the device and negative
(8)
(8)
(8)
(8)
(8)
(9)
INA = V
INA = V
IN from 0 to V
IN from 0 to V
OUTx at V
C
OUTx at V
C
C
C
C
C
0 - 5V
INA=INB, OUTA and OUTB
at 50% Point
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
6
=0.22µF, f=1kHz
=0.22µF, f=1kHz
=0.22µF, f=1kHz
=0.22µF, f=1kHz
=2200pF
=2200pF
IN
, 1V/ns Slew Rate
DD
DD
Conditions
, INB = 0V
, INB = 0V
DD
DD
/2,
/2,
DD
DD
Figure 7. Inverting Timing Diagram
-175.0
Min.
-1.5
3.5
3.3
4.5
0.8
0.2
9
Typ.
0.70
-2.8
500
4.3
3.9
3.7
1.2
1.6
0.4
12
17
-5
5
9
2
Max.
175.0
18.0
0.95
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4.3
4.1
2.0
1.5
0.8
20
17
29
4
Unit
mA
mA
µA
µA
ns
ns
ns
ns
V
V
V
V
V
V
A
A
A
A