LPC1768FBD100 NXP Semiconductors, LPC1768FBD100 Datasheet - Page 34

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LPC1768FBD100

Manufacturer Part Number
LPC1768FBD100
Description
IC, 32BIT MCU ARM CORTEX 100MHZ LQFP-100
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1768FBD100

Controller Family/series
(ARM Cortex)
No. Of I/o's
70
Ram Memory Size
64KB
Cpu Speed
100MHz
No. Of Timers
4
Interface
CAN, I2C, SPI, UART
Core Size
32 Bit
Program Memory Size
512KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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NXP Semiconductors
LPC1769_68_67_66_65_64_63
Product data sheet
Fig 5.
LPC17xx clocking generation block diagram
7.29.1.1 Internal RC oscillator
7.29.1.2 Main oscillator
7.29.1.3 RTC oscillator
LPC17xx
OSCILLATOR
OSCILLATOR
OSCILLATOR
INTERNAL
MAIN
RTC
RC
See
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the
PLL and subsequently the CPU. The nominal IRC frequency is 4 MHz. The IRC is
trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the LPC17xx use the IRC as the clock source. Software
may later switch to one of the other available clock sources.
The main oscillator can be used as the clock source for the CPU, with or without using the
PLL. The main oscillator also provides the clock source for the dedicated USB PLL.
The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be
boosted to a higher frequency, up to the maximum CPU operating frequency, by the main
PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock
frequency is referred to as CCLK elsewhere in this document. The frequencies of
PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The
clock frequency for each peripheral can be selected individually and is referred to as
PCLK. Refer to
The RTC oscillator can be used as the clock source for the RTC block, the main PLL,
and/or the CPU.
32 kHz
Figure 5
(CLKSRCSEL)
system
select
rtclk = 1Hz
clock
for an overview of the LPC17xx clock generation.
pclk
All information provided in this document is subject to legal disclaimers.
Section 7.29.2
WDT
WATCHDOG
MAIN PLL
USB PLL
TIMER
Rev. 6.01 — 11 March 2011
REAL-TIME
CLOCK
main PLL enable
for additional information.
LPC1769/68/67/66/65/64/63
pllclk
PERIPHERAL
GENERATOR
CLOCK
CPU clock config
USB clock config
(USBCLKCFG)
(CCLKCFG)
DIVIDER
DIVIDER
CLOCK
CLOCK
CPU
USB
32-bit ARM Cortex-M3 microcontroller
CCLK/4
CCLK/2
CCLK
CCLK/8
CCLK/6
cclk
USB PLL enable
CORTEX-M3
(48 MHz)
ETHERNET
usbclk
BLOCK
ARM
GPIO
NVIC
DMA
USB BLOCK
APB peripherals
© NXP B.V. 2011. All rights reserved.
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