LPC1768FBD100 NXP Semiconductors, LPC1768FBD100 Datasheet - Page 59

no-image

LPC1768FBD100

Manufacturer Part Number
LPC1768FBD100
Description
IC, 32BIT MCU ARM CORTEX 100MHZ LQFP-100
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1768FBD100

Controller Family/series
(ARM Cortex)
No. Of I/o's
70
Ram Memory Size
64KB
Cpu Speed
100MHz
No. Of Timers
4
Interface
CAN, I2C, SPI, UART
Core Size
32 Bit
Program Memory Size
512KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1768FBD100
Manufacturer:
ST
Quantity:
1 001
Part Number:
LPC1768FBD100
Manufacturer:
NXP
Quantity:
5 530
Part Number:
LPC1768FBD100
Manufacturer:
ALTERA
0
Part Number:
LPC1768FBD100
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1768FBD100
0
Company:
Part Number:
LPC1768FBD100
Quantity:
4 000
Part Number:
LPC1768FBD100+551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1768FBD100,551
Quantity:
9 999
Part Number:
LPC1768FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1768FBD100,551
Manufacturer:
NXP
Quantity:
1 800
Part Number:
LPC1768FBD100,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1768FBD100/CP3282
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1768FBD100K
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1768FBD100K
0
NXP Semiconductors
Table 16.
C
[1]
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 21. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
PERIOD
differential
data lines
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
11.8 USB interface
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Ω
Remark: The USB controller is available as a device/Host/OTG controller on parts
LPC1769/68/66/65 and as device-only controller on part LPC1764.
on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
All information provided in this document is subject to legal disclaimers.
; 3.0 V
+ t
FDEOP
Rev. 6.01 — 11 March 2011
V
DD(3V3)
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 21
must accept as
EOP; see
Figure 21
t
r
/ t
LPC1769/68/67/66/65/64/63
Figure 21
Figure 21
f
3.6 V.
crossover point
extended
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
8.5
7.7
-
1.3
160
−2
−18.5
−9
40
82
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2011. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
59 of 79
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns

Related parts for LPC1768FBD100