LPC1768FBD100 NXP Semiconductors, LPC1768FBD100 Datasheet - Page 9

• Manufacturer Part Number: LPC1768FBD100
• Description: IC, 32BIT MCU ARM CORTEX 100MHZ LQFP-100
• Manufacturer: NXP Semiconductors

Specifications of LPC1768FBD100

• Controller Family/series: (ARM Cortex)
• No. Of I/o's: 70
• Ram Memory Size: 64KB
• Cpu Speed: 100MHz
• No. Of Timers: 4
• Interface: CAN, I2C, SPI, UART
• Core Size: 32 Bit
• Program Memory Size: 512KB
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 4.
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
P0[5]/
I2SRX_WS/
TD2/CAP2[1]
P0[6]/
I2SRX_SDA/
SSEL1/MAT2[0]
P0[7]/
I2STX_CLK/
SCK1/MAT2[1]
P0[8]/
I2STX_WS/
MISO1/MAT2[2]
P0[9]/
I2STX_SDA/
MOSI1/MAT2[3]
P0[10]/TXD2/
SDA2/MAT3[0]
P0[11]/RXD2/
SCL2/MAT3[1]
Pin description
Pin
81
80
79
78
77
76
48
49
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
…continued
Ball
A8
D7
B8
A9
C8
A10
H7
K9
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
All information provided in this document is subject to legal disclaimers.
Type
I/O
I/O
I
I
I/O
I/O
O
I
I/O
I/O
I/O
O
I/O
I/O
I/O
O
I/O
I/O
I/O
O
I/O
I/O
I/O
O
I/O
O
I/O
O
I/O
I
I/O
O
Rev. 6.01 — 11 March 2011
Description
P0[4] — General purpose digital input/output pin.
I2SRX_CLK — Receive Clock. It is driven by the master and received
by the slave. Corresponds to the signal SCK in the I
specification. (LPC1769/68/67/66/65/63 only).
RD2 — CAN2 receiver input. (LPC1769/68/66/65/64 only).
CAP2[0] — Capture input for Timer 2, channel 0.
P0[5] — General purpose digital input/output pin.
I2SRX_WS — Receive Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification. (LPC1769/68/67/66/65/63 only).
TD2 — CAN2 transmitter output. (LPC1769/68/66/65/64 only).
CAP2[1] — Capture input for Timer 2, channel 1.
P0[6] — General purpose digital input/output pin.
I2SRX_SDA — Receive data. It is driven by the transmitter and read
by the receiver. Corresponds to the signal SD in the I
specification. (LPC1769/68/67/66/65/63 only).
SSEL1 — Slave Select for SSP1.
MAT2[0] — Match output for Timer 2, channel 0.
P0[7] — General purpose digital input/output pin.
I2STX_CLK — Transmit Clock. It is driven by the master and received
by the slave. Corresponds to the signal SCK in the I
specification. (LPC1769/68/67/66/65/63 only).
SCK1 — Serial Clock for SSP1.
MAT2[1] — Match output for Timer 2, channel 1.
P0[8] — General purpose digital input/output pin.
I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification. (LPC1769/68/67/66/65/63 only).
MISO1 — Master In Slave Out for SSP1.
MAT2[2] — Match output for Timer 2, channel 2.
P0[9] — General purpose digital input/output pin.
I2STX_SDA — Transmit data. It is driven by the transmitter and read
by the receiver. Corresponds to the signal SD in the I
specification. (LPC1769/68/67/66/65/63 only).
MOSI1 — Master Out Slave In for SSP1.
MAT2[3] — Match output for Timer 2, channel 3.
P0[10] — General purpose digital input/output pin.
TXD2 — Transmitter output for UART2.
SDA2 — I
MAT3[0] — Match output for Timer 3, channel 0.
P0[11] — General purpose digital input/output pin.
RXD2 — Receiver input for UART2.
SCL2 — I
MAT3[1] — Match output for Timer 3, channel 1.
LPC1769/68/67/66/65/64/63
2
2
C2 clock input/output (this is not an open-drain pin).
C2 data input/output (this is not an open-drain pin).
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
2
2
S-bus
S-bus
2
2
S-bus
S-bus
2
2
S-bus
S-bus
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