LPC1768FBD100 NXP Semiconductors, LPC1768FBD100 Datasheet - Page 62

• Manufacturer Part Number: LPC1768FBD100
• Description: IC, 32BIT MCU ARM CORTEX 100MHZ LQFP-100
• Manufacturer: NXP Semiconductors

Specifications of LPC1768FBD100

• Controller Family/series: (ARM Cortex)
• No. Of I/o's: 70
• Ram Memory Size: 64KB
• Cpu Speed: 100MHz
• No. Of Timers: 4
• Interface: CAN, I2C, SPI, UART
• Core Size: 32 Bit
• Program Memory Size: 512KB
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
12. ADC electrical characteristics
Table 18.
V
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
V
C
E
E
E
E
E
R
f
f
clk(ADC)
c(ADC)
DDA
IA
ia
D
L(adj)
O
G
T
vsi
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
ADCOFFS value (bits 7:4) = 2 in the ADTRM register. See LPC17xx user manual UM10360.
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
See
The conversion frequency corresponds to the number of samples per second.
= 2.7 V to 3.6 V; T
Figure
ADC characteristics (full resolution)
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
ADC clock frequency
ADC conversion frequency
27.
Figure
G
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
T
amb
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
26.
Fig 25.
=
L(adj)
−
40
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
°
C to +85
SPI slave timing (CPHA = 0)
Figure
SCK (CPOL = 0)
SCK (CPOL = 1)
All information provided in this document is subject to legal disclaimers.
Conditions
°
C unless otherwise specified; ADC frequency 13 MHz; 12-bit resolution.
26.
MOSI
MISO
Rev. 6.01 — 11 March 2011
Figure
26.
LPC1769/68/67/66/65/64/63
Figure
DATA VALID
DATA VALID
t
SPIQV
26.
[1][2]
[4][5]
[3]
[6]
[7]
[8]
[9]
T
SPICYC
Min
0
-
-
-
-
-
-
-
-
-
t
32-bit ARM Cortex-M3 microcontroller
SPIDSU
DATA VALID
DATA VALID
t
SPICLKH
t
Typ
-
-
-
-
-
-
-
-
-
-
SPIDH
t
SPICLKL
t
002aad989
SPIOH
Max
V
15
±1
±3
±2
0.5
4
7.5
13
200
Figure
© NXP B.V. 2011. All rights reserved.
DDA
26.
Unit
V
pF
LSB
LSB
LSB
%
LSB
kΩ
MHz
kHz
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