UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 111

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
5.2.2 Port 1
using port mode register 1 (PM1). When the P10 to P17 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 1 (PU1).
Port 1 is an 8-bit I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units
This port can also be used for external interrupt request input, serial interface data I/O, clock I/O, and timer I/O.
Reset signal generation sets port 1 to input mode.
Figures 5-8 to 5-12 show block diagrams of port 1.
Caution To use P10/SCK10/TxD0 and P12/SO10 as general-purpose ports, set serial operation mode
WR
WR
WR
P1:
PU1:
PM1:
RD:
WR××: Write signal
RD
PORT
PM
PU
register 10 (CSIM10) and serial clock selection register 10 (CSIC10) to the default status (00H).
Read signal
Port register 1
Pull-up resistor option register 1
Port mode register 1
Output latch
Alternate
Alternate
function
function
PM10
PU10
(P10)
PM1
PU1
P1
Figure 5-8. Block Diagram of P10
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17260EJ6V0UD
EV
DD
P-ch
P10/SCK10/TxD0
111

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