UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 146

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(3) Setting of operation mode for subsystem clock pin
146
Note The main clock mode register (MCM) is used to set the main system clock supplied to CPU clock (high-
Caution
Remark
The operation mode for the subsystem clock pin can be set by using bit 6 (XTSTART) of the processor clock
control register (PCC) and bits 5 and 4 (EXCLKS, OSCSELS) of the clock operation mode select register
(OSCCTL) in combination.
f
f
f
f
f
f
XP
XP
XP
XP
XP
SUB
XTSTART
CPU Clock (f
/2
/2
/2
/2
/2
PCC
Bit 6
2
3
4
0
0
0
0
1
speed system clock/internal high-speed oscillation clock) (see Figure 6-6).
Table 6-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
Confirm that bit 5 (CLS) of the processor clock control register (PCC) is 0 (CPU is operating
with main system clock) when changing the current values of XTSTART, EXCLKS, and
OSCSELS.
×: don’t care
EXCLKS
CPU
Bit 5
)
0
0
1
1
×
OSCCTL
Table 6-3. Setting of Operation Mode for Subsystem Clock Pin
0.2
0.4
0.8
1.6
3.2
High-Speed System Clock
At 10 MHz
Operation
µ
µ
µ
µ
µ
OSCSELS
s
s
s
s
s
Bit 4
0
1
0
1
×
−
0.1
0.2
0.4
0.8
1.6
CHAPTER 6 CLOCK GENERATOR
I/O port mode
I/O port mode
XT1 oscillation mode
External clock input mode
XT1 oscillation mode
At 20 MHz
Operation
µ
µ
µ
µ
µ
Subsystem Clock Pin
s
s
s
s
s
User’s Manual U17260EJ6V0UD
Main System Clock
Operation Mode
Minimum Instruction Execution Time: 2/f
Note
0.25
0.5
1.0
2.0
4.0
At 8 MHz (TYP.) Operation
µ
µ
µ
µ
µ
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
Internal High-Speed
Oscillation Clock
s (TYP.)
I/O port
Crystal resonator connection
I/O port
I/O port
Crystal resonator connection
−
P123/XT1 Pin
Note
122.1
CPU
At 32.768 kHz Operation
µ
Subsystem Clock
External clock input
s
P124/XT2/EXCLKS
−
−
−
−
−
Pin