LPC1758FBD80 NXP Semiconductors, LPC1758FBD80 Datasheet - Page 50

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LPC1758FBD80

Manufacturer Part Number
LPC1758FBD80
Description
IC, 32BIT MCU, ARM CORTEX, 100MHZ LQFP80
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1758FBD80

Controller Family/series
(ARM Cortex)
No. Of I/o's
52
Ram Memory Size
64KB
Cpu Speed
100MHz
No. Of Timers
4
Interface
CAN, I2C, SPI, UART
Core Size
32 Bit
Program Memory Size
512KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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NXP Semiconductors
Table 13.
C
[1]
LPC1758_56_54_52_51_3
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
L
Fig 16. Differential data-to-EOP transition skew and EOP width
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
differential
data lines
PERIOD
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
11.7 USB interface
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Ω
on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
, unless otherwise specified.
+ t
FDEOP
Rev. 03 — 19 November 2009
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 16
must accept as
EOP; see
Figure 16
t
r
/ t
Figure 16
Figure 16
f
crossover point
extended
LPC1758/56/54/52/51
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
8.5
7.7
-
1.3
160
−2
−18.5
−9
40
82
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2009. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
50 of 64

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