LPC1758FBD80 NXP Semiconductors, LPC1758FBD80 Datasheet - Page 51

• Manufacturer Part Number: LPC1758FBD80
• Description: IC, 32BIT MCU, ARM CORTEX, 100MHZ LQFP80
• Manufacturer: NXP Semiconductors

Specifications of LPC1758FBD80

• Controller Family/series: (ARM Cortex)
• No. Of I/o's: 52
• Ram Memory Size: 64KB
• Cpu Speed: 100MHz
• No. Of Timers: 4
• Interface: CAN, I2C, SPI, UART
• Core Size: 32 Bit
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC1758_56_54_52_51_3
Product data sheet
11.8 SPI
Table 14.
T
[1]
[2]
Symbol
T
T
t
t
SPI master
t
t
t
t
SPI slave
t
t
t
t
SPICLKH
SPICLKL
SPIDSU
SPIDH
SPIQV
SPIOH
SPIDSU
SPIDH
SPIQV
SPIOH
amb
Fig 17. SPI master timing (CPHA = 1)
cy(PCLK)
SPICYC
T
processor clock CCLK.
Timing parameters are measured with respect to the 50 % edge of the clock PCLK and the 10 % (90 %)
edge of the data signal (MOSI or MISO).
=
SPICYC
−
40
°
= (T
Dynamic characteristics of SPI pins
C to +85
SCK (CPOL = 0)
SCK (CPOL = 1)
Parameter
PCLK cycle time
SPI cycle time
SPICLK HIGH time
SPICLK LOW time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
cy(PCLK)
MOSI
MISO
°
C.
× n) ± 0.5 %, n is the SPI clock divider value (n ≥ 8); PCLK is derived from the
Rev. 03 — 19 November 2009
DATA VALID
[1]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
T
DATA VALID
SPICYC
t
SPIQV
Min
10
79.6
0.485
0
2
2
2
0
2
2
2
×
×
×
×
×
×
LPC1758/56/54/52/51
T
T
T
T
T
T
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
×
32-bit ARM Cortex-M3 microcontroller
T
t
t
SPICYC
SPICLKH
SPIDSU
− 5
+ 30
+ 5
+ 5
+ 35
+ 15
DATA VALID
DATA VALID
t
SPICLKL
t
SPIDH
Typ
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
0.515
-
-
-
-
-
-
-
-
t
© NXP B.V. 2009. All rights reserved.
002aad986
SPIOH
×
T
SPICYC
51 of 64
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns