MA160014 Microchip Technology, MA160014 Datasheet - Page 247

• Manufacturer Part Number: MA160014
• Description: MOD PLUG-IN 44PIN PIC18LF45K22
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of MA160014

• Accessory Type: Plug-In Module (PIM) - PIC18LF45K10
• Product: Microcontroller Modules
• Data Bus Width: 8 bit
• Core Processor: PIC18LF45K22
• Interface Type: I2C, SPI
• Operating Supply Voltage: 1.8 V to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PICDEM PIC18 Explorer, DM183032
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 15-31:
15.6.10
While in Sleep mode, the I
addresses or data and when an address match or
complete byte transfer occurs, wake the processor
from Sleep (if the MSSPx interrupt is enabled).
15.6.11
A Reset disables the MSSPx module and terminates
the current transfer.
 2010 Microchip Technology Inc.
Note: T
SLEEP OPERATION
EFFECTS OF A RESET
SCLx
SDAx
Write to SSPxCON2,
Falling edge of
9th clock
BRG
= one Baud Rate Generator period.
STOP CONDITION RECEIVE OR TRANSMIT MODE
ACK
2
set PEN
C slave module can receive
T
T
BRG
BRG
SDAx asserted low before rising edge of clock
to set up Stop condition
T
SCLx brought high after T
BRG
Preliminary
P
SCLx = 1 for T
after SDAx sampled high. P bit (SSPxSTAT<4>) is set.
T
BRG
15.6.12
In Multi-Master mode, the interrupt generation on the
detection of the Start and Stop conditions allows the
determination of when the bus is free. The Stop (P) and
Start (S) bits are cleared from a Reset or when the
MSSPx module is disabled. Control of the I
be taken when the P bit of the SSPxSTAT register is
set, or the bus is Idle, with both the S and P bits clear.
When the bus is busy, enabling the SSPx interrupt will
generate the interrupt when the Stop condition occurs.
In multi-master operation, the SDAx line must be
monitored for arbitration to see if the signal level is the
expected output level. This check is performed by
hardware with the result placed in the BCLxIF bit.
The states where arbitration can be lost are:
• Address Transfer
• Data Transfer
• A Start Condition
• A Repeated Start Condition
• An Acknowledge Condition
PEN bit (SSPxCON2<2>) is cleared by
PIC18(L)F2X/4XK22
hardware and the SSPxIF bit is set
BRG
BRG
, followed by SDAx = 1 for T
MULTI-MASTER MODE
BRG
DS41412D-page 247
2
C bus may