ETHER-1GIG-XP-N3 Lattice, ETHER-1GIG-XP-N3 Datasheet - Page 19

• Manufacturer Part Number: ETHER-1GIG-XP-N3
• Description: Ethernet ICs Gigabit Ethernet MAC
• Manufacturer: Lattice

Specifications of ETHER-1GIG-XP-N3

• Product: Ethernet Controllers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
2. Reception of a 64-byte Frame with Error(s) - Rx MAC Application Interface
(Gigabit Mode)
The signal rx_error is asserted to indicate that the 64-byte frame was received with error(s).
Figure 4. Reception of a 64-byte Frame with Error
3. Reception of a 64-Byte Frame with FIFO Overflow - Rx MAC Application Interface
(Gigabit Mode)
The FIFO writing operation is suspended whenever an overflow condition occurs. When this condition occurs, the
Tri-Speed MAC asserts rx_fifo_error. This signal should be sampled along with rx_eof in order to process
the error condition.
Figure 5. Reception of a 64-byte Frame with FIFO Overflow
rx_stat_vector[31:0]
rx_stat_vector[31:0]
rx_appclk
rx_dbout[15:0]
rx_byte_en[1:0]
rx_stat_en
rx_eof
rx_fifo_error
rx_write
rx_error
rx_byte_en[1:0]
rx_dbout[15:0]
rx_fifo_error
rx_stat_en
rx_appclk
rx_fifo_full
rx_write
rx_error
rx_eof
1,2
1,2
3,4
11
3,4
11
5,6
5,6
19
Media Access Controller User’s Guide
59,60 61,62 63,64
59,60 61,62 63,64
11
11
10/100 and 1Gig Ethernet
Valid
Valid
0 0
0 0