ETHER-1GIG-XP-N3 Lattice, ETHER-1GIG-XP-N3 Datasheet - Page 20

• Manufacturer Part Number: ETHER-1GIG-XP-N3
• Description: Ethernet ICs Gigabit Ethernet MAC
• Manufacturer: Lattice

Specifications of ETHER-1GIG-XP-N3

• Product: Ethernet Controllers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
4. Successful Transmission of a 64-Byte Frame -Tx MAC Application Interface
(Gigabit Mode)
The assertion of tx_fifoavail indicates a frame is waiting to be transmitted. The Tri-Speed MAC reads the FIFO
and the data is transmitted until tx_fifoeof is asserted. Once the frame is transmitted, tx_staten is asserted
to qualify the statistic vector, tx_statvec. The signal tx_done is asserted to indicate a successful transmission.
This is shown in Figure 6.
Figure 6. Transmission of a 64-Byte Frame without Error
sine_tx_firame_ready
tx_fifodata[15:0]
tx_fifobyten[1:0]
tx_staten[31:0]
tx_fifoempty
tx_macread
sine_tx_clk
tx_discfrm
tx_staten
tx_fifoeof
tx_done
1,2
11
3,4
20
Media Access Controller User’s Guide
59,60 61,62 63,64
11
10/100 and 1Gig Ethernet
0 0
Valid