HUFA75617D3S Fairchild Semiconductor, HUFA75617D3S Datasheet - Page 7

• Manufacturer Part Number: HUFA75617D3S
• Description: MOSFET N-CH 100V 16A DPAK
• Manufacturer: Fairchild Semiconductor
• Series: UltraFET™r

Specifications of HUFA75617D3S

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 90 mOhm @ 16A, 10V
• Drain To Source Voltage (vdss): 100V
• Current - Continuous Drain (id) @ 25° C: 16A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 39nC @ 20V
• Input Capacitance (ciss) @ Vds: 570pF @ 25V
• Power - Max: 64W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PSPICE Electrical Model
.SUBCKT HUFA75617d3 2 1 3 ;
CA 12 8 9.9e-10
CB 15 14 1.0e-9
CIN 6 8 5.4e-10
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 117.8
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 5.24e-9
LSOURCE 3 7 4.25e-9
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 3.9e-2
RGATE 9 20 2.45
RLDRAIN 2 5 10
RLGATE 1 9 52.4
RLSOURCE 3 7 42.5
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 3.2e-2
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*32),3.5))}
.MODEL DBODYMOD D (IS = 6.0e-13 RS = 11.0e-3 XTI = 4.5 TRS1 = 1.1e-3 TRS2 = 7.1e-6 CJO = 6.5e-10 TT = 4.1e-8 M = 0.54)
.MODEL DBREAKMOD D (RS = 5.6e- 1TRS1 = 8.0e- 4TRS2 = 3.0e-6)
.MODEL DPLCAPMOD D (CJO = 7.0e-1 0IS = 1e-3 0M = 0.89 N = 10)
.MODEL MMEDMOD NMOS (VTO = 3.10 KP = 3 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.45)
.MODEL MSTROMOD NMOS (VTO = 3.64 KP = 42 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.68 KP = 0.02 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 24.5)
.MODEL RBREAKMOD RES (TC1 = 1.05e- 3TC2 = -5.0e-7)
.MODEL RDRAINMOD RES (TC1 = 1.20e-2 TC2 = 3.00e-5)
.MODEL RSLCMOD RES (TC1 = 3.2e-3 TC2 = 1.0e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -2.2e-3 TC2 = -9.0e-6)
.MODEL RVTEMPMOD RES (TC1 = -2.4e- 3TC2 = -1.8e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.9 VOFF= -3.1)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.1 VOFF= -5.9)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.6 VOFF= 0.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -0.6)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
GATE
1
rev 24May 2000
RLGATE
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
8
6
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
MSTRO
+
-
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
7
+
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
HUFA75617D3 Rev. B
SOURCE
DRAIN
2
3