MT45W2MW16BGB-701 IT Micron Technology Inc, MT45W2MW16BGB-701 IT Datasheet - Page 26

• Manufacturer Part Number: MT45W2MW16BGB-701 IT
• Manufacturer: Micron Technology Inc

Specifications of MT45W2MW16BGB-701 IT

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Bus Configuration Register
Figure 19:
PDF: 09005aef82832fa2/Source: 09005aef82832f5f
32mb_burst_cr1_0_p24z_2.fm - Rev. E 9/08 EN
Must be set to "0"
BCR[19]
0
1
Bus Configuration Register Definition
Reserved
BCR[15]
20
A20
0
1
Register Select
Select RCR
Select BCR
Register
BCR[13]
Must be set to "0"
Select
19
0
0
0
0
1
1
1
1
A19
Note:
Operating Mode
Asynchronous access mode (default)
Synchronous burst access mode
BCR[8]
0
1
Reserved
BCR[12] BCR[11] Latency Counter
A[18:16]
18–16
BCR[10]
The BCR defines how the CellularRAM device interacts with the system memory bus.
Page mode operation is enabled by a bit contained in the RCR. Figure 19 describes the
control bits in the BCR. At power-up, the BCR is set to 9D4Fh.
The BCR is accessed using CRE and A[19] HIGH or through the configuration register
software sequence with DQ = 0001h on the third cycle.
0
0
1
1
0
0
1
1
0
1
WAIT Configuration
Asserted one data cycle before delay (default)
Asserted during delay
Operating
Mode
All burst WRITEs are continuous.
15
A15
WAIT Polarity
Active LOW
Active HIGH (default)
Must be set to "0"
0
1
0
1
0
1
0
1
Reserved
32Mb: 2 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Code 0–reserved
Code 1–reserved
Code 2
Code 3 (default)
Code 4–reserved
Code 5–reserved
Code 6–reserved
Code 7–reserved
14
A14
A13
13 12 11
Counter
Latency
A12 A11 A10
Polarity
WAIT
10
Must be set to "0"
Reserved
9
A9
26
Configuration (WC)
WAIT
8
A8
BCR[6]
Must be set to "0"
0
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Reserved
BCR[5]
Clock Configuration
Not supported
Rising edge (default)
A7
7
0
1
BCR[3]
Configuration (CC)
0
1
Output Impedance
1/4 drive
Full drive (default)
Clock
BCR[2]
6
0
0
0
1
A6
Burst Wrap (Note 1)
Burst wraps within the burst length
Burst no wrap (default)
BCR[1] BCR[0] Burst Length (Note 1)
Configuration Registers
Impedance
0
1
1
1
Output
Must be set to "0"
5
A5
1
0
1
1
©2007 Micron Technology, Inc. All rights reserved.
Reserved
A4
4
4 words
8 words
16 words
Continuous burst (default)
Wrap (BW)*
Burst
3
A3
Length (BL)*
2 1
A2 A1 A0
Burst
0