PCA2002U/10AB/1,00 NXP Semiconductors, PCA2002U/10AB/1,00 Datasheet - Page 16

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PCA2002U/10AB/1,00

Manufacturer Part Number
PCA2002U/10AB/1,00
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA2002U/10AB/1,00

Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
Fig 11. Bare die outline PCA200xCX (WLCSP8)
PCA2002_6
Product data sheet
WLCSP8: wafer level chip-size package; 8 bumps; 1.16 x 0.86 x 0.31 mm
DIMENSIONS (mm are the original dimensions)
mm
PCA200xCX
UNIT
VERSION
OUTLINE
max
nom
min
0.310
0.275
0.240
A
0.090
0.075
0.060
A
1
Table 11.
[1]
[2]
[3]
Symbol
V
i.c.
OSCIN
MOT1
MOT2
RESET
OSCOUT
V
IEC
SS
DD
[3]
0.22
0.20
0.18
e
A
[2]
D
All coordinates are referenced, in μm, to the center of the die (see
The substrate (rear side of the chip) is connected to V
connected to V
Pad i.c. is used for factory test; in normal operation it must be left open-circuit, and it has an internal
pull-down resistor connected to V
D
2
0.12
0.10
0.08
b
Bonding pad and solder bump locations
32 kHz watch circuit with programmable output period and pulse width
1.16
JEDEC
b
D
All information provided in this document is subject to legal disclaimers.
SS
.
0.86
REFERENCES
e
E
1
Pad
1
2
3
4
5
6
7
8
e
0.17
Rev. 06 — 6 May 2010
2
e
1
E
0.32
JEITA
e
2
SS
.
0.96
e
D
Coordinates
x
−480
−480
−480
−480
+480
+480
+480
+480
SS
. Therefore, the die pad must be either floating or
X
0
A
[1]
PROJECTION
Figure 10
EUROPEAN
A
2
A
1
scale
0.5
and
detail X
y
+330
+160
−160
−330
−330
−160
+160
+330
Figure
PCA2002
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
11).
1 mm
08-05-09
08-05-21
PCA200xCX
16 of 26

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