PCA2002U/10AB/1,00 NXP Semiconductors, PCA2002U/10AB/1,00 Datasheet - Page 7

• Manufacturer Part Number: PCA2002U/10AB/1,00
• Manufacturer: NXP Semiconductors

Specifications of PCA2002U/10AB/1,00

• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
PCA2002_6
Product data sheet
7.6 Programming procedure
To ensure that the oscillator starts up correctly you must execute a reset sequence (see
Figure
For a watch it is essential that the timing calibration can be made after the watch is fully
assembled. In this situation, the supply pins are often the only terminals which are still
accessible.
Writing to the OTP cells and performing the related functional checks is achieved in the
PCA2002 by modulating the supply voltage. The necessary control circuit consists
basically of a voltage level detector, an instruction counter which determines the function
to be performed, and an 8-bit shift register which allows writing the OTP cells of an 8-bit
word in one step and which acts as data pointer for checking the OTP content.
Each instruction state is switched on with a pulse to V
initial waiting time of t
modulating the supply voltage with small pulses (amplitude V
The first small pulse defines the start time, the following pulses perform three different
functions, depending on the time delay (t
Figure
The programming procedure requires a stable oscillator, which means that a waiting time,
determined by the start-up time of the oscillator, is necessary after power-up of the circuit.
Fig 4.
•
•
•
•
•
•
•
•
•
State 1; measurement of the crystal oscillator frequency (divided by 1024)
State 2; measurement of the inhibition time
State 3; write/check word A
State 4; write/check word B
State 5; check word C (don’t care since no meaning)
State 6; check word D (type recognition)
t
t
t
d
d
d
= t
= t
= t
4).
6,
1
2
3
t
V
Supply voltage at start-up during production and testing
Figure
d(start)
(0.7 ms); increments the instruction counter
(1.7 ms); clocks the shift register with data = logic 0
(2.7 ms); clocks the shift register with data = logic 1
DD(nom)
32 kHz watch circuit with programmable output period and pulse width
: start delay time.
All information provided in this document is subject to legal disclaimers.
: nominal supply voltage.
7,
Figure 8
0
V
DD(nom)
is required. The programming instructions are then entered by
Rev. 06 — 6 May 2010
V
SS
V
and
DD
Figure
9):
d
) from the preceding pulse (see
t
d(start)
> 500 ms
V
P(prog)(stop)
P(prog)(start)
P(mod)
001aac503
t
p(stop)
. After this large pulse, an
and pulse width t
PCA2002
© NXP B.V. 2010. All rights reserved.
Figure
5,
7 of 26
mod
).