ISP1362BDFA STEricsson, ISP1362BDFA Datasheet - Page 129

• Manufacturer Part Number: ISP1362BDFA
• Manufacturer: STEricsson

Specifications of ISP1362BDFA

• Lead Free Status / RoHS Status: Compliant

Table 154. Dynamic characteristics: peripheral controller programmed interface timing
V
ISP1362_7
Product data sheet
Symbol
Read timing (see
t
t
t
t
t
t
t
t
Write timing (see
t
t
t
t
t
RHAX
AVRL
SHDZ
RHSH
RLRH
RLDV
SHRL
SHRL
WHAX
AVWL
SHWL
SHWL
WLWH
Fig 30. Host controller programmed interface timing
CC
= 3.0 V to 3.6 V; GND = 0 V; T
+ t
+ t
RLRH
WLWH
D [ 15:0 ]
D [ 15:0 ]
+ t
WR
19.1.2 Peripheral controller programmed I/O timing
+ t
RD
CS
A0
RHSH
WHSH
Figure
Figure
Parameter
address hold time after RD HIGH
address set-up time before RD LOW
data outputs high-impedance time after CS
HIGH
chip deselect time after RD HIGH
RD pulse width
data valid time after RD LOW
CS HIGH until next ISP1362 RD
read cycle time
address hold time after WR HIGH
address set-up time before WR LOW
CS HIGH until next ISP1362 WR
write cycle time
WR pulse width
31)
32)
valid
data
t
AS
amb
t
AH
=
−
40
t
SHSL
°
C to +85
t
RLDV
Rev. 07 — 29 September 2009
valid
data
°
t
C; unless otherwise specified.
RLRH
valid
t
data
WL
t
t
WHWL
RHRL
t
WDH
valid
Conditions
data
data
valid
T
T
WC
RC
t
SLRL
valid
data
[1]
t
WDSU
Single-chip USB OTG controller
valid
data
Min
0
0
-
0
25
-
120
180
1
0
120
180
22
t
RHSH
t
RHDZ
t
SLWL
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
data
valid
© ST-ERICSSON 2009. All rights reserved.
valid
data
Max
-
-
3
-
-
22
-
-
-
-
-
-
-
ISP1362
mgt969
t
WHSH
129 of 147
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns