EP2S15F484C3N Altera, EP2S15F484C3N Datasheet - Page 129

• Manufacturer Part Number: EP2S15F484C3N
• Description: IC STRATIX II FPGA 15K 484-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S15F484C3N

• Number Of Logic Elements/cells: 15600
• Number Of Labs/clbs: 780
• Total Ram Bits: 419328
• Number Of I /o: 342
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Type: Stratix II
• No. Of I/o's: 342
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 550MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1874; EP2S15F484C3N

Altera Corporation
May 2007
April 2006,
v4.1
December
2005, v4.0
May 2005, v3.0
January 2005,
v2.1
January 2005,
v2.0
July 2004, v1.1
February 2004,
v1.0
Table 3–7. Document Revision History (Part 2 of 2)
Document
Date and
Version
Updated “Device Security Using Configuration
Bitstream Encryption” section.
Updated “Software Interface” section.
●
●
Updated JTAG chain device limits.
Updated Table 3–3.
●
●
●
Added document to the Stratix II Device Handbook.
Updated “IEEE Std. 1149.1 JTAG Boundary-Scan
Support” section.
Updated “Operating Modes” section.
Added “Automated Single Event Upset (SEU)
Detection” section.
Updated “Device Security Using Configuration
Bitstream Encryption” section.
Updated Figure 3–2.
Changes Made
Stratix II Device Handbook, Volume 1
Summary of Changes
Configuration & Testing
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