EP2S15F484C3N Altera, EP2S15F484C3N Datasheet - Page 154

IC STRATIX II FPGA 15K 484-FBGA

EP2S15F484C3N

Manufacturer Part Number
EP2S15F484C3N
Description
IC STRATIX II FPGA 15K 484-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S15F484C3N

Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
342
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Type
Stratix II
No. Of I/o's
342
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Operating Temperature Range
0°C To +85°C
Logic Case Style
BGA
No. Of Pins
484
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1874
EP2S15F484C3N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S15F484C3N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2S15F484C3N
Manufacturer:
ALTERA
0
Part Number:
EP2S15F484C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2S15F484C3N
0
Operating Conditions
5–18
Stratix II Device Handbook, Volume 1
Notes for
(1)
(2)
50-Ω R
3.3/2.5
50-Ω R
2.5
25-Ω R
1.8
50-Ω R
1.8
50-Ω R
1.8
50−Ω R
1.5
50-Ω R
1.5
50−Ω R
1.2
50-Ω R
1.2
Table 5–30. Series On-Chip Termination Specification for Top & Bottom I/O Banks (Part 2 of 2)
Notes (1)
Symbol
The resistance tolerances for calibrated SOCT and POCT are for the moment of calibration. If the temperature or
voltage changes over time, the tolerance may also change.
On-chip parallel termination with calibration is only supported for input pins.
S
T
S
S
T
T
T
S
S
Table
,
2
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (25-Ω setting)
Internal series termination without
calibration (25-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
5–30:
Description
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
Conditions
= 3.3/2.5 V
= 3.3/2.5 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.5 V
= 1.5 V
= 1.5 V
= 1.2 V
= 1.2 V
= 1.2 V
Commercial
Max
±30
±30
±30
±30
±10
±36
±10
±50
±10
±5
±5
±5
±8
±8
Resistance Tolerance
Industrial
Altera Corporation
Max
±10
±30
±30
±10
±30
±10
±30
±15
±10
±36
±15
±10
±50
±15
April 2011
Unit
%
%
%
%
%
%
%
%
%
%
%
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%
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