MC68030CRC25C Freescale Semiconductor, MC68030CRC25C Datasheet - Page 333

• Manufacturer Part Number: MC68030CRC25C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9
9-32
field contains $7FFF.
for a write access and the M bit of the page descriptor is clear, the processor
sets the bit if the table search does not encounter a set WP bit or a supervisor
violation. Since the read-modify-write (RMC) signal is asserted throughout
the entire table search operation, the read and write operations to update
the history bits are guaranteed to be uninterrupted.
A table search terminates successfully when a page descriptor is encoun-
tered. The occurrence of an invalid descriptor, a limit violation, or a bus error
The MC68030 enforces a limit on the index value for the next level of a table
The root pointer includes a limit field that applies when the function code
descriptor applies and also reduces the size of the translation table. The index
bit is set, the limit is a lower limit, and an index less than the limit is out of
bounds. When the L/U bit is zero, the limit is an upper limit, and an index
greater than the limit is out of bounds. The limit field is effectively disabled
if L/U is set and the limit field contains zero or if L/U is clear and the limit
During a table search for an normal translation or a PLOAD instruction, if a
limit violation is detected, the ATC is loaded with an entry having the bus
error (B) bit set. If a limit violation is detected during a table search for a
PTEST instruction, the invalid (I) and limit (L) bits are set in the MMUSR.
During a table search, the U bit in each descriptor that is encountered is
checked and set if it is not already set. Similarly, when the table search is
also terminates a table search, and the MC68030 takes an exception on the
retry of the cycle because of these conditions. The exception routine should
distinguish between anticipated conditions and true error conditions. The
or one that identifies a portion of the translation table yet to be allocated. A
limit violation or a bus error due to a system malfunction may result in an
error message and termination of the task.
search when long-format descriptors are used.
lookup is not used (the FCL bit of the TC register is zero). The index used to
access the next level table is compared to the contents of the limit field. The
limit field effectively reduces the portion of the address space to which a
must reside within the range defined by the limit field. The limit can be a
lower limit or an upper limit, according to the L/U bit value. When the L/U
routine can correct an invalid descriptor that indicates a nonresident page
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