PIC32MX664F064LT-I/PT Microchip Technology Inc., PIC32MX664F064LT-I/PT Datasheet - Page 38

• Manufacturer Part Number: PIC32MX664F064LT-I/PT
• Description: 100 TQFP 12X12X1MM T/R, 100 PINS, 64KB FLASH, 32KB RAM, 80 MHZ, USB, ETHERNET, 4
• Manufacturer: Microchip Technology Inc.

Specifications of PIC32MX664F064LT-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: I2C/SPI/UART/USB
• Memory Type: Flash
• Number Of Bits: 32
• Package Type: 100-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 32K Bytes
• Speed: 80 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC32MX5XX/6XX/7XX
TABLE 1-1:
DS61156F-page 38
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMCS1
PMCS2
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
PMALL
PMALH
PMRD
PMWR
V
V
V
Legend: CMOS = CMOS compatible input or output
Note 1:
Pin Name
USB
BUS
BUSON
2:
ST = Schmitt Trigger input with CMOS levels
TTL = TTL input buffer
Pin numbers are provided for reference only. See the
See
QFN/TQFP
Section 24.0 “Ethernet Controller”
64-Pin
PINOUT I/O DESCRIPTIONS (CONTINUED)
16
22
32
31
28
27
24
23
45
44
45
44
60
61
62
63
64
30
29
53
52
34
35
—
—
—
—
—
—
—
—
11
8
6
5
4
1
2
3
Pin Number
100-Pin
TQFP
100
14
12
11
10
29
28
50
49
42
41
35
34
71
70
71
70
93
94
98
99
90
89
88
87
79
80
83
84
44
43
82
81
54
55
20
3
4
5
(1)
121-Pin
XBGA
C11
D11
C11
D11
L11
L10
F3
F2
F4
E3
K3
A4
B4
B3
A2
A1
D3
C1
D2
A5
E6
A6
B6
A9
D8
D7
C7
K7
B8
C8
H8
H9
H1
L2
L7
J7
J5
L5
L8
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
for more information.
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
I
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
Analog
Buffer
Type
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
“Pin
Analog = Analog input
O = Output
Diagrams” section for device pin availability.
Parallel Master Port address (Demultiplexed
Master modes)
Parallel Master Port Chip Select 1 strobe
Parallel Master Port Chip Select 2 strobe
Parallel Master Port data (Demultiplexed
Master mode) or address/data (Multiplexed
Master modes)
Parallel Master Port address latch enable
low byte (Multiplexed Master modes)
Parallel Master Port address latch enable
high byte (Multiplexed Master modes)
Parallel Master Port read strobe
Parallel Master Port write strobe
USB bus power monitor
USB internal transceiver supply
USB Host and OTG bus power control output
© 2010 Microchip Technology Inc.
Description
P = Power
I = Input