K4S643232H-TI70 Samsung Semiconductor, K4S643232H-TI70 Datasheet - Page 11

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K4S643232H-TI70

Manufacturer Part Number
K4S643232H-TI70
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of K4S643232H-TI70

Lead Free Status / Rohs Status
Not Compliant
Note :
K4S643232H
AC CHARACTERISTICS
CLK cycle time
CLK to valid
output delay
Output data hold time
CLK high pulse
width
CLK low
pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS latency=3
CAS latency=2
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
SAC
t
t
t
t
t
SHZ
SLZ
CC
OH
CH
SS
SH
CL
Min
1.5
2.5
10
5
2
2
3
2
3
1
1
-
-
-
-
-50
1000
Max
4.5
4.5
6
6
-
-
-
-
-
-
-
-
-
- 11
Min
5.5
1.5
2.5
10
2
2
3
2
3
1
1
-
-
-
-
-55
1000
Max
5.0
5.0
6
6
-
-
-
-
-
-
-
-
-
Min
2.5
2.5
1.5
2.5
10
6
2
3
3
1
1
-
-
-
-
-60
1000
Max
5.5
5.5
6
6
-
-
-
-
-
-
-
-
-
Rev. 1.2 April 2006
1.75
Min
2.5
10
7
2
3
3
3
3
1
1
-
-
-
-
-70
1000
Max
5.5
5.5
6
6
-
-
-
-
-
-
-
-
-
SDRAM
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1, 2
1
2
3
3
3
3
2
-

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