TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 80

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.1
Overview
7.1.2.2
service routine. This is called "pre-emption".
Table 7-2 Priority grouping setting
(1)
When an exception occurs, the CPU suspends the currently executing process and branches to the interrupt
Exception Handling and Branch to the Interrupt Service Routine (Pre-emption)
<PRIGROUP[2:0]>
in the following order:
state of the stack after the register contents have been pushed.
setting
When the CPU detects an exception, it pushes the contents of the following eight registers to the stack
The SP is decremented by eight words by the completion of the stack push.The following shows the
Note:If the configuration of <PRI_n> is less than 8 bits, the lower bit is "0". For the example, in
Stacking
000
001
010
011
100
101
110
111
・ Program Counter (PC)
・ Program Status Register (xPSR)
・ r0 - r3
・ r12
・ Link Register (LR)
the case of 3-bit configuration, the priority is set as <PRI_n[7:5]> and <PRI_n[4:0]> is
"00000".
in the table are the number in the case that <PRI_n> is defined as an 8-bit configuration.
The Table 7-2 shows the priority group setting. The pre-emption priority and the sub priority
Pre-emption
None
[7:1]
[7:2]
[7:3]
[7:4]
[7:5]
[7:6]
field
[7]
<PRI_n[7:0]>
Subpriority
field
[1:0]
[2:0]
[3:0]
[4:0]
[5:0]
[6:0]
[7:0]
[0]
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pre-emption
Number of
priorities
128
64
32
16
8
4
2
1
TMPM330FDFG/FYFG/FWFG
subpriorities
Number of
128
256
16
32
64
2
4
8