TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 84

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TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
7.3
Non-Maskable Interrupts (NMI)
7.3
7.4
and Status Register, the counter loads with the value set in the Reload Value Register and begins counting down.When
the counter reaches "0", a SysTick exception occurs.You may be pending exceptions and use a flag to know when the
timer reaches "0".
clock frequency varies with each product, and so the value set in the SysTick Calibration Value Register also varies
with each product.
Non-Maskable Interrupts (NMI)
SysTick
Non-maskable interrupts are generated from the following two sources.
Use the NMI Flag (CGNMIFLG) Register of the clock generator to identify the source of a non-maskable interrupt.
SysTick provides interrupt features using the CPU's system timer.
When you set a value in the SysTick Reload Value Register and enable the SysTick features in the SysTick Control
The SysTick Calibration Value Register holds a reload value for counting 10 ms with the system timer. The count
Note:In this product, the system timer counts based on a clock obtained by dividing the clock input from the
・ External NMI pin
・ Non-maskable interrupt by WDT
X1 pin by 32.The SysTick Calibration Value Register is set to 0x9C4, which provides 10 ms timing when
the clock input from X1 is 8 MHz.
on the WDT.
A non-maskable interrupt is generated when an external NMI pin changes from "High" to "Low".
The watchdog timer (WDT) has a non-maskable interrupt generating feature. For details, see the chapter
Page 64
TMPM330FDFG/FYFG/FWFG

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