LFXP3E-3QN208I Lattice, LFXP3E-3QN208I Datasheet - Page 7

• Manufacturer Part Number: LFXP3E-3QN208I
• Description: IC FPGA 3.1KLUTS 136I/O 208-PQFP
• Manufacturer: Lattice

Specifications of LFXP3E-3QN208I

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
LatticeXP sysCONFIG Usage Guide
Lattice ispTRACY Usage Guide
HDL Synthesis Coding Guidelines for Lattice Semiconductor FPGAs
Activity Factor................................................................................................................................................. 12-17
Ambient and Junction Temperature and Airflow ............................................................................................ 12-18
Managing Power Consumption ...................................................................................................................... 12-18
Power Calculator Assumptions ...................................................................................................................... 12-19
Revision History ............................................................................................................................................. 12-20
Technical Support Assistance........................................................................................................................ 12-20
Appendix A. Power Calculator Project Example ............................................................................................ 12-21
Introduction ...................................................................................................................................................... 13-1
Programming Overview.................................................................................................................................... 13-1
Configuration Pins............................................................................................................................................ 13-2
Configuration Modes and Options.................................................................................................................... 13-9
Wake Up Options ........................................................................................................................................... 13-15
Software Selectable Options.......................................................................................................................... 13-16
Technical Support Assistance........................................................................................................................ 13-19
Revision History ............................................................................................................................................. 13-19
Introduction ...................................................................................................................................................... 14-1
ispTRACY IP Core Features ............................................................................................................................ 14-1
ispTRACY IP Module Generator ...................................................................................................................... 14-1
ispTRACY Core Generator .............................................................................................................................. 14-2
ispTRACY Core Linker..................................................................................................................................... 14-4
ispTRACY ispLA Program................................................................................................................................ 14-6
Conclusion ....................................................................................................................................................... 14-9
References....................................................................................................................................................... 14-9
Technical Support Assistance.......................................................................................................................... 14-9
Introduction ...................................................................................................................................................... 15-1
General Coding Styles for FPGA ..................................................................................................................... 15-1
Power Calculator Wizard......................................................................................................................... 12-8
Power Calculator – Creating a New Project Without the NCD File ....................................................... 12-13
Power Calculator – Creating a New Project With the NCD File ............................................................ 12-14
Power Calculator – Open Existing Project ............................................................................................ 12-16
Power Calculator – Total Power............................................................................................................ 12-17
Dedicated Pins ........................................................................................................................................ 13-3
Dual-Purpose sysCONFIG Pins.............................................................................................................. 13-7
ispJTAG Pins .......................................................................................................................................... 13-8
Configuration and JTAG Voltage Levels ................................................................................................. 13-9
Configuration Options ........................................................................................................................... 13-10
Slave Serial Mode ................................................................................................................................. 13-11
Master Serial Mode ............................................................................................................................... 13-11
Slave Parallel Mode .............................................................................................................................. 13-12
Self Download Mode ............................................................................................................................. 13-14
ispJTAG Mode ...................................................................................................................................... 13-14
Wake Up Sequence .............................................................................................................................. 13-15
PERSISTENT Bit .................................................................................................................................. 13-17
Configuration Mode............................................................................................................................... 13-17
DONE Open Drain ................................................................................................................................ 13-17
DONE External...................................................................................................................................... 13-18
Master Clock Selection ......................................................................................................................... 13-18
Security ................................................................................................................................................. 13-18
Wake Up Sequence .............................................................................................................................. 13-18
Wake Up Clock Selection...................................................................................................................... 13-18
INBUF ................................................................................................................................................... 13-19
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LatticeXP Family Handbook
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