TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 113

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

7.3.7
ACK*/READY
SWE*/BWE*
ADDR [19:0]
DATA [31:0]
7.3.7.1
SYSCLK
CE*/BE*
(Output)
Access Timing
OE*
SHWT Option
Control Register is a value other than “0.” This option inserts Setup cycles and Hold cycles
between signals as follows.
will be identical, so each cycle cannot be set individually.
modes, but there is one restriction: the internal bus cannot use Burst access.
of the settings of the SHWT option. When the SHWT option is disabled, the setup cycles of SEW*
and BWE* relative to CE*, and the hold cycles of OE*, SEW* and BWE* relative to CE* are one
clock cycle.
Figure 7.3.5 SWHT Disable (Normal Mode, Single Read/Write Cycle)
The SHWT option is selected when the SHWT (Setup/Hold Wait Time) field of the Channel
Setup cycle: CE* from ADDR, OE* from CE*, BWE* from CE*, SWE* from CE*.
Hold cycle: ADDR from CE*, CE* from OE*, CE* from BWE*, CE* from SWE*
This option is used for I/O devices that are generally slow. All Setup cycles and Hold cycles
The SHWT mode cannot be used by the Page mode. The SHWT mode can be used by all other
The hold cycles of DATA relative to SWE* and BWE* are fixed at one clock cycle, regardless
7-13
Chapter 7 External Bus Controller
EBCCRn.PWT:WT=0
EBCCRn.SHWT=0