TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 340

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

Bits
31:0
31
15
10.4.51 G2P Configuration Data Register (G2PCFGDATA)
Mnemonic
ICD
the PCI Configuration Space is specified by the G2P Configuration Address Register (G2PCFGADRS).
The lower two bits of the address are specified by the lower two bits of the offset address in this register
as shown in Figure 10.4.2.
mode.
Access Size
This is the only register that supports Byte access and 16-bit Word access. The upper address bit of
The operation of any access to this register is undefined when the PCI Controller is in the Satellite
32-bit
16-bit
Initiator
Configuration
Data
8-bit
Field Name
Table 10.4.2 PCI Configuration Space Access Address
Figure 10.4.49 G2P Configuration Data Register
Configuration Space
Initiator Configuration Data Register (Default--)
This is a data port that is used when performing initiator PCI configuration
access. PCI configuration Read or Write transactions are issued when this
register is read to or written from.
Address [1:0]
00
00
10
00
01
10
11
R/W
ICD
ICD
R/W
⎯
⎯
10-82
Little Endian Mode
Description
0xD1A4
0xD1A4
0xD1A6
0xD1A4
0xD1A5
0xD1A6
0xD1A7
Chapter 10 PCI Controller
Offset Address
0xD1A4
Big Endian Mode
0xD1A4
0xD1A6
0xD1A4
0xD1A7
0xD1A6
0xD1A5
0xD1A4
Read/Write
R/W
16
0
: Type
: Initial value
: Type
: Initial value