TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 319

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

63:38
35:8
Bit
7:0
37
36
63
47
31
15
10.4.33 G2P Memory Space 2 G-Bus Base Address Register (G2PM2GBASE)
Mnemonic
BA[35:8]
BSWAP
EXFER
Reserved
Byte Swap
Endian Transfer
Base Address
Reserved
Figure 10.4.31 G2P Memory Space 2 G-Bus Base Address Register
Field Name
BA[15:8]
R/W
0x00
Reserved
Byte Swap Disable
(Default: Little Endian Mode: 0x1; Big Endian Mode: 0x0) Sets the byte
swapping of Memory Space 0.
1: Do not perform byte swapping.
0: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “1”
when in the Big Endian Mode, the byte order of transfer to Memory Space
0 through DWORD (32-bit) access will not change.
Endian Transfer
(Default: Little Endian Mode: 0x0; Big Endian Mode: 0x1)
Sets the Endian Transfer of Memory Space 0.
1: Performs Endian Transfer.
0: Does not perform Endian Transfer.
Please use the default state.
Base Address (Default: Normal Mode: 0x0_0000_00; PCI Boot Mode:
0x0_1FC0_00)
Sets the G-Bus base bus address of Memory Space 2 for initiator access.
Can set the base address in 256-byte units.
0x0000/0x1FC0
BA[31:16]
Reserved
8
R/W
10-61
7
38
Description
BSWAP
0x0/0x1 0x1/0x0
R/W
37
Chapter 10 PCI Controller
EXFER
R/W
36
Reserved
0x00
R
35
BA[35:32]
R/W
0x0
0xD130
Read/Write
R/W
R/W
R/W
R
48
32
16
0
⎯
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value