TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 157

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

8.
8.1
DMA Controller
<DMAC0, DMAC1>
<DMAC0>
<DMAC1>
Features
Memory Access) with memory and I/O devices.
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The TX4937 contains two four-channel DMA Controller (DMAC0, DMAC1) that executes DMA (Direct
The DMA Controller has the following characteristics.
Has four on-chip DMA channels
Supports Memory-Memory Copy modes that do not have address boundary limitations. Burst transfer of
up to eight double words is possible for each Read or Write operation.
Supports Memory Fill mode that writes double-word data to the specified memory region
Supports Chained DMA Transfer
On-chip signed 24-bit address count up registers for both the source address and destination address
On-chip 26-bit Byte Count Register for each channel
One of two methods can be selected for determining access priority among multiple channels: Round
Robin or Fixed Priority
Big Endian or Little Endian mode can be set separately for each channel
Supports external I/O devices with 8-, 16-, and 32-bit Data Bus widths and transfer between memory
devices.
Supports single address transfer (Fly-by DMA) and dual address transfer when in the external I/O DMA
Transfer Mode that is operated by external request signals
Supports DMA on-chip Serial I/O Controllers
Supports DMA on-chip AC-Link Controllers
8-1
Chapter 8 DMA Controller