P89LPC931FDH NXP Semiconductors, P89LPC931FDH Datasheet - Page 15

• Manufacturer Part Number: P89LPC931FDH
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin TSSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of P89LPC931FDH

• Package: 28TSSOP
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Ram Size: 256 Byte
• Program Memory Size: 8 KB
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 2

Table 4:
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TAMOD
TCON*
TH0
TH1
TL0
TL1
TMOD
TRIM
WDCON
WDL
WFEED1
WFEED2
All ports are in input only (high impedance) state after power-up.
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ‘0’. If any are written while BRGEN = 1, the result is unpredictable.
Unimplemented bits in SFRs (labeled ’-’) are X (unknown) at all times. Unless otherwise specified, ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset values shown for these bits are ’0’s although they are unknown when read.
The RSTSRC register reflects the cause of the P89LPC930/931 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is
xx110000.
After reset, the value is 111001x1, i.e., PRE2-PRE0 are all ‘1’, WDRUN = 1 and WDCLK = 1. WDTOF bit is ‘1’ after Watchdog reset and is ‘0’ after power-on reset. Other resets will
not affect WDTOF.
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
The only reset source that affects these SFRs is power-on reset.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Special function registers
Description
Timer 0 and 1 auxiliary mode
Timer 0 and 1 control
Timer 0 HIGH
Timer 1 HIGH
Timer 0 LOW
Timer 1 LOW
Timer 0 and 1 mode
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
Bit address
…continued
SFR
addr.
8CH
8DH
C1H
C2H
C3H
8FH
88H
8AH
8BH
89H
96H
A7H
Bit functions and addresses
T1GATE
PRE2
MSB
TF1
8F
-
-
ENCLK
T1C/T
PRE1
TR1
8E
-
TRIM.5
PRE0
T1M1
TF0
8D
-
TRIM.4
T1M2
T1M0
TR0
8C
-
T0GATE
TRIM.3
IE1
8B
-
-
WDRUN
TRIM.2
T0C/T
IT1
8A
-
WDTOF
TRIM.1
T0M1
IE0
89
-
WDCLK
TRIM.0
T0M2
T0M0
LSB
IT0
88
Reset value
Hex
00
00
00
00
00
00
00
FF
[5] [6]
[4] [6]
Binary
xxx0xxx0
00000000
00000000
00000000
00000000
00000000
00000000
11111111