P89LPC931FDH NXP Semiconductors, P89LPC931FDH Datasheet - Page 17

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P89LPC931FDH

Manufacturer Part Number
P89LPC931FDH
Description
MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin TSSOP Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC931FDH

Package
28TSSOP
Device Core
80C51
Family Name
89LP
Maximum Speed
18 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
2

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Product data
8.2.6 Clock output
8.3 On-chip RC oscillator option
8.4 Watchdog oscillator option
8.5 External clock input option
the minimum specified operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when V
specified operating voltage.
The P89LPC930/931 supports a user-selectable clock output function on the
XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if
another clock source has been selected (on-chip RC oscillator, Watchdog oscillator,
external clock input on X1) and if the Real-Time clock is not using the crystal
oscillator as its clock source. This allows external devices to synchronize to the
P89LPC930/931. This output is enabled by the ENCLK bit in the TRIM register. The
frequency of this clock output is
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
The P89LPC930/931 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
pre-programmed value to adjust the oscillator frequency to 7.373 MHz, 1% at room
temperature. End-user applications can write to the Trim register to adjust the on-chip
RC oscillator to other frequencies.
The watchdog has a separate oscillator which has a frequency of 400 kHz. This
oscillator can be used to save power when a high clock frequency is not needed.
In this configuration, the processor clock is derived from an external source driving
the XTAL1/P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2/P3.0 pin
may be used as a standard port pin or a clock output. When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be enabled. An
external circuit is required to hold the device in reset at power-up until V
reached its specified level. When system power is removed V
the minimum specified operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when V
specified operating voltage.
Rev. 05 — 15 December 2004
1
8-bit microcontrollers with two-clock 80C51 core
2
that of the CCLK. If the clock output is not needed
DD
DD
P89LPC930/931
falls below the minimum
falls below the minimum
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
DD
will fall below
DD
17 of 55
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