P89LPC931FDH NXP Semiconductors, P89LPC931FDH Datasheet - Page 21
P89LPC931FDH
Manufacturer Part Number
P89LPC931FDH
Description
MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin TSSOP Tube
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC931FDH.pdf
(55 pages)
Specifications of P89LPC931FDH
Package
28TSSOP
Device Core
80C51
Family Name
89LP
Maximum Speed
18 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
2
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Philips Semiconductors
9397 750 14472
Product data
Fig 5. Interrupt sources, interrupt enables, and power-down wake-up sources.
(RTCCON.1)
WDOVF
ERTC
RTCF
8.11 I/O ports
The P89LPC930/931 has four I/O ports: Port 0, Port 1, Port 2, and Port 3. Ports 0, 1
and 2 are 8-bit ports, and Port 3 is a 2-bit port. The exact number of I/O pins available
depend upon the clock and reset options chosen, as shown in
Table 5:
[1]
Clock source
On-chip oscillator or
Watchdog oscillator
External clock input
Low/medium/high
speed oscillator
(external crystal or
resonator)
Required for operation above 12 MHz.
EA (IE0.7)
TI & RI/RI
ES/ESR
EWDRT
CMF2
CMF1
EKBI
ESPI
KBIF
EI2C
SPIF
EBO
BOF
EST
EX0
EX1
ET0
ET1
TF0
TF1
IE0
IE1
EC
TI
SI
Number of I/O pins available
Rev. 05 — 15 December 2004
Reset option
No external reset (except during power-up)
External RST pin supported
No external reset (except during power-up)
External RST pin supported
No external reset (except during power-up)
External RST pin supported
8-bit microcontrollers with two-clock 80C51 core
[1]
[1]
[1]
P89LPC930/931
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
002aaa432
INTERRUPT
TO CPU
WAKE-UP
(IF IN POWER-DOWN)
Table
Number of I/O pins
(20-pin package)
26
25
25
24
24
23
5.
21 of 55