P89LPC931FDH NXP Semiconductors, P89LPC931FDH Datasheet - Page 35

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P89LPC931FDH

Manufacturer Part Number
P89LPC931FDH
Description
MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin TSSOP Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC931FDH

Package
28TSSOP
Device Core
80C51
Family Name
89LP
Maximum Speed
18 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
2

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Product data
Fig 13. Comparator input and output connections.
(P0.5) CMPREF
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
V REF
8.20.1 Internal reference voltage
8.20 Analog comparators
Two analog comparators are provided on the P89LPC930/931. Input and output
options allow use of the comparators in a number of different configurations.
Comparator operation is such that the output is a logic 1 (which may be read in a
register and/or routed to a pin) when the positive input (one of two selectable pins) is
greater than the negative input (selectable from a pin or an internal reference
voltage). Otherwise the output is a ‘0’. Each comparator may be configured to cause
an interrupt when the output value changes.
The overall connections to both comparators are shown in
comparators function to V
When each comparator is first enabled, the comparator output and interrupt flag are
not guaranteed to be stable for 10 microseconds. The corresponding comparator
interrupt should not be enabled during that time, and the comparator interrupt flag
must be cleared before the interrupt is enabled in order to prevent an immediate
interrupt service.
When a comparator is disabled the comparator’s output, COx, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFx.
This will cause an interrupt if the comparator interrupt is enabled. The user should
therefore disable the comparator interrupt prior to disabling the comparator.
Additionally, the user should clear the comparator flag, CMFx, after disabling the
comparator.
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as V
REF
, is 1.23 V 10%.
CN1
CN2
CP1
CP2
Rev. 05 — 15 December 2004
Comparator 1
Comparator 2
DD
CO1
CO2
= 2.4 V.
Change Detect
Change Detect
8-bit microcontrollers with two-clock 80C51 core
OE1
OE2
CMF1
CMF2
P89LPC930/931
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CMP1 (P0.6)
CMP2 (P0.0)
Figure
EC
002aaa422
13. The
Interrupt
35 of 55

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