PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 225

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

Data Sheet
SCD
RSC
PERR
RPF
Sync Character Detected
Only valid in Hunt Mode.
This bit is set to ’1’ if a SYN character is found in the received data
stream after the ’HUNT’ command has been issued in register CMDRH.
The receiver now is in the synchronous state.
Receive Status Change Interrupt
This bit is valid in HDLC Automode only.
It is set to ’1’, if a status change of the remote station receiver has been
detected by receiving a S-frame with receiver ready (RR) or receiver not
ready (RNR) indication. Because only a status change is indicated via
this interrupt, the current status can be evaluated by reading bit ’RRNR’
in status register STARH.
Parity Error Interrupt
This bit is only valid if parity checking/generation is enabled via bit
’PARE’ in register CCR3H.
It is set to ’1’, if a character with wrong parity has been received. If
enabled via bit CCR3H:RFDF, this error status is additionally stored in
the receive status byte generated for each receive character.
Receive Pool Full Interrupt
This bit is set to ’1’ if the RFIFO threshold level, set with bit field
’RFTH(1:0)’ in register CCR3H, is reached. Default threshold level is 32
data bytes in HDLC/PPP modes, 1 data byte in ASYNC/BISYNC modes.
5-225
Register Description (ISR2)
(async/bisync modes)
(bisync mode)
PEB 20542
PEF 20542
(hdlc mode)
(all modes)
2000-09-14