STM32L162QD STMicroelectronics, STM32L162QD Datasheet - Page 16

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STM32L162QD

Manufacturer Part Number
STM32L162QD
Description
Ultra-low-power ARM Cortex-M3 MCU with 384 Kbytes Flash, 32 MHz CPU, LCD, USB, 3xOp-amp, AES
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32L162QD

Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V
7 Modes
Sleep, Low-power run (11 μA at 32 kHz), Low-power sleep (4.4 μA), Stop with RTC, Stop (650 nA), Standby with RTC, Standby (300 nA)
Ultralow Leakage Per I/o
50 nA max
Fast Wakeup Time From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
12-channel DMA controller
11 Timers
one 32-bit and six 16-bit general-purpose timers, two 16-bit basic timers, two watchdog timers (independent and window)

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Part Number:
STM32L162QDH6
Manufacturer:
STMicroelectronics
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Functional overview
Note:
3.3.3
3.3.4
16/124
Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To
reduce the power consumption in Stop mode, it is possible to automatically switch off the
internal reference voltage (V
V
reset circuit.
The start-up time at power-on is typically 3.3 ms when BOR is active at power-up, the start-
up time at power-on can be decreased down to 1 ms typically for devices with BOR inactive
at power-up.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
V
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
Boot modes
At startup, boot pins are used to select one of three boot options:
The boot from Flash usually boots at the beginning of the Flash (bank 1). An additional boot
mechanism is available through user option byte, to allow booting from bank 2 when bank 2
contains valid code. This dual boot capability can be used to easily implement a secure field
software update mechanism.
The boot loader is located in System memory. It is used to reprogram the Flash memory by
using USART1, USART2 or USB.
DD
DD
DD
/V
/V
is below a specified threshold, V
MR is used in Run mode (nominal regulation)
LPR is used in the Low power run, Low power sleep and Stop modes
Power down is used in Standby mode. The regulator output is high impedance, the
kernel circuitry is powered down, inducing zero consumption but the contents of the
registers and RAM are lost except for the standby circuitry (wakeup logic, IWDG, RTC,
LSI, LSE crystal 32K osc, RCC_CSR).
Boot from Flash memory
Boot from System memory
Boot from embedded RAM
DDA
DDA
power supply and compares it to the V
is higher than the V
STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD
REFINT
PVD
Doc ID 022268 Rev 2
threshold. The interrupt service routine can then generate
DD
) in Stop mode. The device remains in reset mode when
POR/PDR
/V
DDA
drops below the V
or V
PVD
BOR
threshold. This PVD offers 7 different
, without the need for any external
PVD
threshold and/or when

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