STM32L162QD STMicroelectronics, STM32L162QD Datasheet - Page 19

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STM32L162QD

Manufacturer Part Number
STM32L162QD
Description
Ultra-low-power ARM Cortex-M3 MCU with 384 Kbytes Flash, 32 MHz CPU, LCD, USB, 3xOp-amp, AES
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32L162QD

Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V
7 Modes
Sleep, Low-power run (11 μA at 32 kHz), Low-power sleep (4.4 μA), Stop with RTC, Stop (650 nA), Standby with RTC, Standby (300 nA)
Ultralow Leakage Per I/o
50 nA max
Fast Wakeup Time From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
12-channel DMA controller
11 Timers
one 32-bit and six 16-bit general-purpose timers, two 16-bit basic timers, two watchdog timers (independent and window)

Available stocks

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Manufacturer
Quantity
Price
Part Number:
STM32L162QDH6
Manufacturer:
STMicroelectronics
Quantity:
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Part Number:
STM32L162QDH6
Manufacturer:
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0
STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD
3.5
3.6
Low power real-time clock and backup registers
The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain
the sub-second, second, minute, hour (12/24 hour), week day, date, month, year, in BCD
(binary-coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the
month are made automatically. The RTC provides two programmable alarms and
programmable periodic interrupts with wakeup from Stop and Standby modes.
The programmable wakeup time ranges from 120 µs to 36 hours.
The RTC can be calibrated with an external 512 Hz output, and a digital compensation
circuit helps reduce drift due to crystal deviation.
The RTC can also be automatically corrected with a 50/60Hz stable powerline.
The RTC calendar can be updated on the fly down to sub second precision, which enables
network system synchronisation.
A time stamp can record an external event occurrence, and generates an interrupt.
There are thirty-two 32-bit backup registers provided to store 128 bytes of user application
data. They are cleared in case of tamper detection.
Three pins can be used to detect tamper events. A change on one of these pins can reset
backup register and generate an interrupt. To prevent false tamper event, like ESD event,
these three tamper inputs can be digitally filtered.
GPIOs (general-purpose inputs/outputs)
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions, and can be individually
remapped using dedicated AFIO registers. All GPIOs are high-current-capable except for
analog pins. The alternate function configuration of I/Os can be locked if needed following a
specific sequence in order to avoid spurious writing to the I/O registers. The I/O controller is
connected to the AHB with a toggling speed of up to 16 MHz.
External interrupt/event controller (EXTI)
The external interrupt/event controller consists of 23 edge detector lines used to generate
interrupt/event requests. Each line can be individually configured to select the trigger event
(rising edge, falling edge, both) and can be masked independently. A pending register
maintains the status of the interrupt requests. The EXTI can detect an external line with a
pulse width shorter than the Internal APB2 clock period. Up to 115 GPIOs can be connected
to the 16 external interrupt lines. The 7 other lines are connected to RTC, PVD, USB or
Comparator events.
Doc ID 022268 Rev 2
Functional overview
19/124

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