ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 134

• Manufacturer Part Number: ST72324BJ6
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BJ6

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

Instruction set
Table 76.
11.1.1
11.1.2
134/193
Relative
Relative
Bit
Bit
Bit
Bit
CPU addressing mode overview (continued)
Inherent
All Inherent instructions consist of a single byte. The opcode fully specifies all the required
information for the CPU to process the operation.
Table 77.
Immediate
Immediate instructions have two bytes: The first byte contains the opcode and the second
byte contains the operand value.
Direct
Indirect
Direct
Indirect
Direct
Indirect
NOP
TRAP
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC, RRC
SWAP
Relative
Relative
Inherent instructions
Instruction
jrne loop
jrne [$10]
bset $10,#7
bset [$10],#7
btjt $10,#7,skip
btjt [$10],#7,skip
PC+/-127
PC+/-127
00..FF
00..FF
00..FF
00..FF
No operation
S/W interrupt
Wait for interrupt (low power mode)
Halt oscillator (lowest power mode)
Sub-routine return
Interrupt sub-routine return
Set interrupt mask (level 3)
Reset interrupt mask (level 0)
Set carry flag
Reset carry flag
Reset stack pointer
Load
Clear
Push/Pop to/from the stack
Increment/decrement
Test negative or zero
1 or 2 complement
Byte multiplication
Shift and rotate operations
Swap nibbles
00..FF
00..FF
00..FF
Function
byte
byte
byte
ST72324Bxx
+ 1
+ 2
+ 1
+ 2
+ 2
+ 3