ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 168

• Manufacturer Part Number: ST72324BJ6
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BJ6

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

Electrical characteristics
Figure 83. SPI master timing diagram
12.13
Table 112. 10-bit ADC characteristics
168/193
Symbol
V
C
R
C
f
V
f
AREF
ADC
I
AIN
ADC
AIN
lkg
AIN
AIN
MISO
MOSI
ADC clock frequency
Analog reference voltage
Conversion voltage range
Input leakage current for analog
input
External input impedance
External capacitor on analog input
Variation freq. of analog input signal
Internal sample and hold capacitor
SS
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
10-bit ADC characteristics
Subject to general operating conditions for V
(2)
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
See note 2
Parameter
t
su(MI)
(1)
MSB OUT
t
MSB IN
h(MI)
(1)
t
c(SCK)
0.7*V
-40 °C < T
Other T
t
t
t
v(MO)
w(SCKH)
w(SCKL)
DD
Conditions
A
BIT6 OUT
< V
ranges
BIT6 IN
A
< + 85 °C
AREF
DD
DD
, f
< V
and 0.7xV
CPU
DD
, and T
t
h(MO)
DD
V
Min
.
0.4
3.8
A
SSA
unless otherwise specified.
t
t
r(SCK)
f(SCK)
LSB OUT
Typ
LSB IN
12
84
figures
V
±250
Max
V
See
AREF
±1
85
ST72324Bxx
2
DD
and
See note 2
MHz
Unit
nA
µA
Hz
kΩ
pF
pF
V