ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 115

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ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
ST7263Bxx
Figure 48. Transfer sequencing
1. Legend:
EV2: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR
register.
EV3: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR
register.
EV3-1: EVF=1, AF=1, BTF=1; AF is cleared by reading the SR1 register. The BTF is cleared
by releasing the lines (STOP=1, STOP=0) or by writing the DR register (DR=FFh).
Note: If lines are released by STOP=1, STOP=0, the subsequent EV4 is not seen.
EV4: EVF=1, STOPF=1, cleared by reading the SR2 register.
EV5: EVF=1, SB=1, cleared by reading the SR1 register followed by writing the DR register.
EV6: EVF=1, cleared by reading the SR1 register followed by writing the CR register
(for example PE=1).
EV7: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR
register.
EV8: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR
register.
Table 37.
Table 38.
Table 39.
Table 40.
S
S
S
S
S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge
EVx=Event (with interrupt if ITE=1)EV1: EVF=1, ADSL=1, cleared by reading the SR1 register.
Addres
EV
EV
Addres
5
5
s
s
Addres
Addres
s
s
A
A
Slave receiver
Slave Transmitter
Master receiver
Master Transmitter
EV
1
A
EV
A
1
EV
EV
3
6
EV
6
Data1
Data1
EV
8
Data1
Data1
Doc ID 7516 Rev 8
A
A
A
EV
EV
2
3
A
EV
7
Data2
Data2
EV
8
Data2
Data2
A
A
EV
A
3
EV
2
A
EV
.....
7
EV
8
.....
.....
DataN
.....
DataN
DataN
DataN
N
A
On-chip peripherals
A
EV3
-1
N
A
A
EV
2
EV
P
EV
7
8
P
EV
4
P
P
115/186
EV
4

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