ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 95

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ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
ST7263Bxx
Baud Rate register (SCIBRR)
Reset value: 0000 0000 (00h)
Table 29.
Table 30.
Table 31.
.
SCP1
7
TR dividing factor
RR dividing factor
[7:6] SCP[1:0] First SCI Prescaler
[5:3] SCT[2:0] SCI Transmitter rate divisor
[2:0] SCR[2:0] SCI Receiver rate divisor.
Prescaling factors
TR dividing factors
RR dividing factor
SCP0
PR prescaling factor
These 2 prescaling bits allow several standard clock division ranges (see
Table
These 3 bits, in conjunction with the SCP1 & SCP0 bits define the total division
applied to the bus clock to yield the transmit rate clock (see
These 3 bits, in conjunction with the SCP[1:0] bits define the total division applied
to the bus clock to yield the receive rate clock (see
128
16
32
64
1
2
4
8
1
2
4
29).
13
1
3
4
SCT2
Doc ID 7516 Rev 8
SCT1
Read/write
SCT2
SCR2
0
0
0
0
1
1
1
1
0
0
0
SCT0
SCP1
SCR2
0
0
1
1
SCT1
SCR1
Table
0
0
1
1
0
0
1
1
0
0
1
31).
On-chip peripherals
Table
SCR1
30).
SCP0
SCT0
SCR0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
SCR0
0
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