ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 162

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ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
Electrical characteristics
Table 77.
1. Legend: R
2. The above variations depend on the accuracy of the external components used.
3. For speeds around 200 kHz, achieved speed can have ±5% tolerance.
4. For other speed ranges, achieved speed can have ±2% tolerance.
13.11
162/186
400
300
200
100
50
20
(kHz)
f
SCL
NA
NA
83h
10h
24h
5Fh
R
P
P
Table 77
SCL line frequency.
SCL frequency
8-bit ADC
Subject to general operating conditions for V
Table 78.
1. Unless otherwise specified, typical data are based on T
2. When V
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than
4. The stabilization time of the AD converter is masked by the first t
= External pull-up resistance; f
=3.3 kΩ R
Symbol
C
t
R
f
V
t
STAB
ADC
ADC
10k
is then always valid.
ADC
V
AIN
AIN
DD
Ω
). Data based on characterization results, not tested in production.
= 4.1 V
gives the values to be written in the I2CCCR register to obtain the required I
NA
NA
83h
10h
24h
5Fh
ADC clock frequency
Conversion range voltage
External input resistor
Internal sample and hold
capacitor
Stabilization time after ADC
enable
Conversion time (Sample+Hold)
- Sample capacitor loading time
- Hold conversion time
DDA
P
=4.7 kΩ R
8-bit ADC characteristics
and V
f
(1)(2)(3)(4)
CPU
SSA
=4 MHz
Parameter
pins are not available on the pinout, the ADC refer to V
NA
NA
83h
10h
24h
5Fh
P
=3.3 kΩ R
SCL
= I
V
DD
2
C speed; NA = not achievable.
Doc ID 7516 Rev 8
= 5 V
(2)
NA
NA
83h
10h
24h
5Fh
P
=4.7 kΩ R
I2CCCR Value
f
f
CPU
ADC
Conditions
DD
=8 MHz,
=2 MHz
83h
85h
24h
4Ch
FFh
8Ah
P
, f
A
=3.3 kΩ R
=25°C and V
OSC
V
DD
, and T
LOAD
= 4.1 V
83
85h
89h
23h
4Ch
FFh
. The first conversion after the enable
P
DD
A
=4.7 kΩ R
V
Min
-V
SSA
unless otherwise specified.
-
-
-
f
SS
CPU
=5V.
DD
=8 MHz
Typ
and V
83h
85h
8Ah
24h
4Ch
FFh
0
6
-
-
-
6
4
8
(4)
P
(1)
=3.3 kΩ R
SS.
V
V
DD
10
Max
DDA
4
-
(3)
= 5 V
ST7263Bxx
83h
85h
8Ah
23h
4Ch
FFh
P
=4.7 kΩ
1/f
2
MHz
Unit
κΩ
pF
C
µs
V
ADC

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