ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 123

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ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
ST7263Bxx
I²C Data register (DR)
These bits contain the byte to be received or transmitted on the bus.
Reset value: 0000 0000 (00h)
I²C Own Address register (OAR)
Reset value: 0000 0000 (00h)
ADD7
Transmitter mode: byte transmission start automatically when the software writes in the
DR register.
Receiver mode: the first data byte is received automatically in the DR register using the
least significant bit of the address. The following data bytes are then received one by
one after reading the DR register.
D7
7
7
[7:1] ADD[7:1] Interface address.
0 ADD0 Address direction bit.
ADD6
D6
These bits define the I²C bus address of the interface. They are not cleared when
the interface is disabled (PE=0).
This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared
when the interface is disabled (PE=0).
Note: Address 01h is always ignored.
ADD5
D5
Doc ID 7516 Rev 8
ADD4
D4
Read/write
Read/write
ADD3
D3
ADD2
D2
On-chip peripherals
ADD1
D1
ADD0
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D0
0
0

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