ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 182

• Manufacturer Part Number: ST7263BK1
• Description: LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
• Manufacturer: STMicroelectronics

Specifications of ST7263BK1

• 4, 8, 16 Or 32 Kbytes Program Memory: high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection

Known limitations
16.5
16.6
182/186
Halt mode power consumption with ADC on
Description
If the A/D converter is being used when Halt mode is entered, the power consumption in
Halt mode may exceed the maximum specified in the datasheet.
Workaround
Switch off the ADC by software (ADON=0) before executing a HALT instruction.
SCI wrong BREAK duration
Description
A single break character is sent by setting and resetting the SBK bit in the SCICR2 register.
In some cases, the break character may have a longer duration than expected:
- 20 bits instead of 10 bits if M=0
- 22 bits instead of 11 bits if M=1.
In the same way, as long as the SBK bit is set, break characters are sent to the TDO pin.
This may generate one break more than expected.
Occurrence
The occurrence of the problem is random and proportional to the baudrate. With a transmit
frequency of 19200 baud (fCPU=8MHz and SCIBRR=0xC9), the wrong break duration
occurrence is around 1%.
Workaround
If this wrong duration is not compliant with the communication protocol in the application,
software can request that an Idle line be generated before the break character. In this case,
the break duration is always correct assuming the application is not doing anything between
the idle and the break. This can be ensured by temporarily disabling interrupts.
The exact sequence is:
1.
2.
3.
4.
Disable interrupts
Reset and Set TE (IDLE request)
Set and Reset SBK (Break Request)
Re-enable interrupts
Doc ID 7516 Rev 8
ST7263Bxx