ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 50

no-image

ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
I/O ports
9.3.4
Table 15.
1. Reset state
9.3.5
Note:
Note:
50/186
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Port D
Port D
Port D description
Register description
DATA registers (PxDR)
Address
Reset value
For Port C, unused bits (7-3) are not accessible.
The DR register has a specific behavior according to the selected input/output configuration.
Writing the DR register is always taken into account even if the pin is configured as an input.
Reading the DR register returns either the DR register latch content (pin configured as
output) or the digital value applied to the I/O pin (pin configured as input).
When using open-drain I/Os in output configuration, the value read in DR is the digital value
applied to the I/Opin.
without pull-up
without pull-up
without pull-up
without pull-up
with pull-up
with pull-up
with pull-up
with pull-up
Port A Data register (PADR): 0000h
Port B Data register (PBDR): 0002h
Port C Data register (PCDR): 0004h
Port D Data register (PDDR): 0006h
Port A: 0000 0000 (00h)
Port B: 0000 0000 (00h)
Port C: 1111 x000 (FXh)
Port D: 0000 0000 (00h)
Input
(1)
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
I / O
Output
Doc ID 7516 Rev 8
Analog input (ADC)
Analog input (ADC)
Analog input (ADC)
Analog input (ADC)
Signal
Alternate function
CH[3:0] = 1000
(ADCCSR)
CH[3:0] = 1001
(ADCCSR)
CH[3:0] = 1010
(ADCCSR)
CH[3:0] = 1011
(ADCCSR)
Condition
ST7263Bxx

Related parts for ST7263BK1