ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 27

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

ST7LITE49M
5.6
Note:
5.7
Note:
Data EEPROM read-out protection
The read-out protection is enabled through an option bit (see
When this option is selected, the programs and data stored in the EEPROM memory are
protected against Read-out (including a re-write protection). In Flash devices, when this
protection is removed by reprogramming the option byte, the entire Program memory and
EEPROM is first automatically erased.
Both program memory and data EEPROM are protected using the same option bit.
Figure 9.
EEPROM control/status register (EECSR)
Address: 0035h
Reset value: 0000 0000 (00h)
Bits 7:2 = Reserved, forced by hardware to 0
Bit 1 = E2LAT Latch access transfer bit: this bit is set by software.
Bit 0 = E2PGM Programming control and status bit
If the E2PGM bit is cleared during the programming cycle, the memory data is not
guaranteed.
Internal
Programming
voltage
0: Read mode
1: Write mode
It is cleared by hardware at the end of the programming cycle. It can only be cleared by
software if the E2PGM bit is cleared
This bit is set by software to begin the programming cycle. At the end of the
programming cycle, this bit is cleared by hardware.
0: Programming finished or not yet started
1: Programming cycle is in progress
7
0
Data EEPROM programming cycle
DATA LATCHES
WRITE OF
0
READ OPERATION NOT POSSIBLE
0
ERASE CYCLE
Doc ID 13562 Rev 3
0
t
Read/write
PROG
WRITE CYCLE
0
Section 14.1: Option
0
READ OPERATION POSSIBLE
E2LAT
LAT
PGM
Data EEPROM
E2PGM
bytes).
0
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