ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 65

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

ST7LITE49M
Figure 33. AWUFH mode flowchart
1. WDGHALT is an option bit. See option byte section for more details.
2. Peripheral clocked with an external clock source can still be active.
3. Only an AWUFH interrupt and some specific interrupts can exit the MCU from Halt mode (such as external
4. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are
interrupt). Refer to
set to the current software priority level of the interrupt routine and recovered when the CC register is
popped.
Table 18: ST7LITE49M interrupt mapping
(AWUCSR.AWUEN=1)
HALT INSTRUCTION
(Active-Halt disabled)
N
WATCHDOG
WDGHALT
RESET
1
Doc ID 13562 Rev 3
INTERRUPT
Y
1)
ENABLE
3)
OR SERVICE INTERRUPT
0
FETCH RESET VECTOR
AWU RC OSC
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
MAIN OSC
PERIPHERALS
CPU
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
I[1:0] BITS
I[1:0] BITS
I[1:0] BITS
N
256 CPU CLOCK
CYCLE
RESET
Y
WATCHDOG
DELAY
for more details.
DISABLE
2)
XX
XX
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
10
4)
4)
Power saving modes
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