ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 85

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

ST7LITE49M
Figure 44. Block diagram of output compare mode (single timer)
Input capture mode
The 12-bit ATICR register is used to latch the value of the 12-bit free running upcounter
CNTR1 after a rising or falling edge is detected on the ATIC pin. When an Input Capture
occurs, the ICF bit is set and the ATICR register contains the value of the free running
upcounter. An IC interrupt is generated if the ICIE bit is set. The ICF bit is reset by reading
the ATICRH/ATICRL register when the ICF bit is set. The ATICR is a read only register and
always contains the free running upcounter value which corresponds to the most recent
input capture. Any further input capture is inhibited while the ICF bit is set.
Figure 45. Block diagram of input capture mode
ATIC
(ATCSR2)
(ATCSR)
f
(1 ms
@ 8MHz)
LTIMER
timebase
f
OFF
CPU
TRAN1
OVF
DCRx
PRELOAD DUTY CYCLE REG0/1/2/3
ATCSR
CNTR1
ACTIVE DUTY CYCLE REGx
ATICR
COUNTER 1
ICF
CNTR1
12-BIT INPUT CAPTURE REGISTER
ATR1
Doc ID 13562 Rev 3
CMP
ICIE
12-BIT AUTORELOAD REGISTER
INTERRUPT
IC INTERRUPT
CK1
12-BIT UPCOUNTER1
REQUEST
OUTPUT COMPARE CIRCUIT
CK0
REQUEST
CMPIE
CMPFx (PWMxCSR)
(ATCSR)
On-chip peripherals
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