TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 192

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Read-
modify-write
instruction is
prohibited.
SBI0CR1
(1240H)
SBI0DBR
(1241H)
Read-
modify-write
instruction is
prohibited.
3.10.7
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Note: Set the transfer mode and the serial clock after setting <SIOS> to “0” and <SIOINH> to “1”.
Clocked-synchronous 8-bit SIO Mode Control
serial bus interface (SBI) is being operated in clocked synchronous 8-bit SIO mode.
The following registers are used to control and monitor the operation status when the
Transfer
start
0: Stop
1: Start
SIOS
DB7
7
0
7
Serial Bus Interface 0 Data Buffer Register
Figure 3.10.20 Register for the SIO Mode
Continue/
abort
transfer
0: Continue
1: Abort
Serial Bus Interface 0 Control Register 1
SIOINH
transfer
transfer
DB6
6
0
6
W
Transfer mode select
00: Transmit mode
01: (Reserved)
10: Transmit/receive mode
11: Receive mode
SIOM1
92CM22-190
DB5
5
0
5
000
001
010
011
100
101
110 n = 10 19.5 kHz
111
Serial clock selection <SCK2:0> at write
Transfer mode selection
Continue/abort transfer
Indicate transfer start/stop
R (Receiver)/W (Transfer)
00
01
10
11
0
1
0
1
SIOM0
DB4
4
0
n = 4
n = 5
n = 6
n = 7
n = 8
n = 9
4
8-bit transmit mode
(Reserved)
8-bit transmit/receive mode
8-bit receive mode
Continue transfer
Abort transfer (Automatically cleared after transfer aborted)
Stop
Start
Undefined
(External clock : SCK0)
1.25 MHz
78.1 kHz
39.1 kHz
625 kHz
313 kHz
156 kHz
DB3
3
3
System clock: f
f
fscl=
SYS
Serial clock selection and reset monitor
SCK2
= 20 MHz (SCL output to SCK pin)
DB2
2
0
f
2
SYS
2
n
W
[Hz]
SYS
SCK1
DB1
1
0
1
TMP92CM22
2007-02-16
SCK0
DB0
W
0
0
0

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